ARM: dts: UniPhier: add I2C ch4 device node for PH1-sLD3

This I2C device is used SoC-internally for controlling the DMD core.

Signed-off-by: Masahiro Yamada <[email protected]>

diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index 2fa42a600f154834d4d988dcb0181ab456cdbecc..5e294364e6167a219117b416e82ef699f124e0de 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -129,6 +129,15 @@
                        status = "disabled";
                };
 
+               i2c4: i2c@58600000 {
+                       compatible = "panasonic,uniphier-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x58600000 0x40>;
+                       clock-frequency = <400000>;
+                       status = "okay";
+               };
+
                system-bus-controller-misc@59800000 {
                        compatible = "socionext,uniphier-system-bus-controller-misc",
                                     "syscon";